amelius 15 hours ago

Aha, so "2nm" really means 20nm. Good to know.

  • jaguar1878 15 hours ago

    Generally the x um or y nm of a process refers to transistor dimensions (typically gate length), not metal. Minimum metal pitch is still a key dimension for the ability to build useful structures though, so advances like these are very useful.

    • bri3d 14 hours ago

      No, the gate length on most 5nm nodes is like 40nm or something. Since around 2008-ish, the “process name” and the size of any feature have rapidly diverged (even if you use some weird pointless metric like the size of a FinFET fin, nothing on 5nm measures 5nm).

      Ironically, prior to 2008 the process name was backwards the other way, for example 130nm process usually has something like 70nm gates.

      It’s always really just been a marketing thing anyway, since the possible density of a given logic unit in a given manufacturers process will differ due to a huge number of factors.

  • staunton 14 hours ago

    "2nm node" means "one technology iteration after 4nm". (Well, actually after 3nm, but let's not get even more into that nonsense)

    These numbers stopped having anything to do with the sizes of things a long time ago.

    • lidavidm 12 hours ago

      It might be funny to use this as a software versioning scheme. ("What do you mean the next version after v3 is 20A?")

    • blackeyeblitzar 11 hours ago

      So is there any objective way to compare one company’s claims or capabilities against another?

      • brennanpeterson 10 hours ago

        The sram density is a pretty good equivalent. You can arguably do the average of sram and some logic.

        If you take the square root of that...you pretty much end up with (modulo a linear scale) the existing nodes.

        That gets you size. You then need power and speed, which are a bit trickier to compare without a standard/reference device.